Amplifier with amplification stages connected in parallel

ABSTRACT

An amplifier includes amplification stages connected in parallel between an input point and an output point and a feedback circuit, wherein the amplification stages each include a transistor configured to amplify a signal supplied from the input point, a harmonic processing unit configured to process harmonics present in an amplified signal output from an output node of the transistor, a connection point between the output node and the harmonic processing unit, and a transmission line connecting the connection point and the output point, wherein the feedback circuit feeds back a signal at the output point or a midway point of the transmission line of a given one of the amplification stages to a first end of a resistor connected to the connection point of the given one of the amplification stages, a second end of the resistor being connected to the connection point of another one of the amplification stages.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application is based upon and claims the benefit of priorityfrom the prior Japanese Patent Application No. 2017-254608 filed on Dec.28, 2017, with the Japanese Patent Office, the entire contents of whichare incorporated herein by reference.

FIELD

The disclosures herein relate to an amplifier.

BACKGROUND

There are certain types of amplifiers known in the art that includeharmonic processing circuits provided for respective transistors toprocess harmonics present in the signals output from the transistors anda matching circuit situated at the stage following the harmonicprocessing circuits to combine the output signals of the transistors. Insuch an amplifier, the output terminals of transistors may be connectedto each other through resistors in order to reduce oscillation that mayoccur due to phase differences between the output signals of transistors(see Patent Document 1, for example).

The point at which a harmonic processing circuit is coupled to arespective transistor may correspond to the antinode of a standing wave.In such a case, phase differences between standing waves occurring atthe respective points may cause large electric power exceeding atolerance level to be applied to the oscillation-suppression resistorsconnecting these points, thereby creating a risk of an open-circuitfailure at the resistors.

RELATED-ART DOCUMENTS Patent Document

[Patent Document 1] International Publication Pamphlet No. WO2012/160755

SUMMARY

According to an aspect of the embodiment, an amplifier includes aplurality of amplification stages connected in parallel between an inputpoint and an output point and a feedback circuit, wherein each of theplurality of amplification stages includes a transistor configured toamplify a high-frequency signal supplied from the input point, aharmonic processing unit coupled to an output node of the transistor andconfigured to process harmonics present in an amplified high-frequencysignal output from the output node, a connection point between theoutput node and the harmonic processing unit, and a transmission lineconnecting the connection point and the output point, wherein thefeedback circuit is configured to feed back a signal at the output pointor a midway point of the transmission line of a given one of theamplification stages to a first end of a resistor, the first end of theresistor being connected to the connection point of the given one of theamplification stages, and a second end of the resistor being connectedto the connection point of another one of the amplification stages.

The object and advantages of the embodiment will be realized andattained by means of the elements and combinations particularly pointedout in the claims. It is to be understood that both the foregoinggeneral description and the following detailed description are exemplaryand explanatory and are not restrictive of the invention, as claimed.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a drawing illustrating an example of the configuration of atransmitter;

FIG. 2 is a drawing illustrating an amplifier serving as a comparativeexample;

FIG. 3 is a drawing illustrating an amplifier according to a firstembodiment;

FIG. 4 is a drawing illustrating an amplifier according to a secondembodiment;

FIG. 5 is a drawing illustrating an amplifier according to a thirdembodiment;

FIG. 6 is a drawing illustrating an amplifier according to a fourthembodiment;

FIG. 7 is a drawing illustrating measured S21 characteristics; and

FIG. 8 is a drawing illustrating measured power added efficiency.

DESCRIPTION OF EMBODIMENTS

In the following, embodiments of the present disclosures will bedescribed with reference to accompanying drawings.

FIG. 1 is a drawing illustrating an example of the configuration of atransmitter having an amplifier of the present disclosures. Atransmitter 100 may be used as a wireless communication device fortransmitting and receiving radio waves, a sensor device such as a radar,and a microwave heating device for transmitting microwaves to heat anobject, for example.

The transmitter 100 may include a baseband circuit 1, a mixer 2, a localoscillator 3, a power amplifier 4, and an antenna 5. A baseband signalor intermediate frequency signal modulated by and output from thebaseband circuit 1 is converted into a transmission frequency band bythe mixer 2 and the local oscillator 3 for amplification by the poweramplifier 4. The signal having been amplified by the power amplifier 4is transmitted from the antenna 5 which is coupled to the output node ofthe power amplifier 4. The mixer 2 mixes the baseband signal orintermediate frequency signal from the baseband circuit 1 with the localoscillator signal from the local oscillator 3 to supply the mixed signalto the input node of the power amplifier 4. The amplifier of the presentdisclosures may be used as the power amplifier 4.

In the following, an amplifier that is an example to be compared withthe amplifier of the present disclosures will be described first.

FIG. 2 is a drawing illustrating an amplifier serving as a comparativeexample. An amplifier 1000 includes two amplification stages 110 and 120that are connected in parallel between an input unit 141 and an outputunit 142.

The amplification stage 110 includes a transistor 111, a transmissionline 112, a harmonic processing unit 113, and a transmission line 115.The transistor 111 amplifies a high-frequency signal supplied from theinput unit 141. The harmonic processing unit 113 processes harmonicspresent in the amplified high-frequency signal output from thetransistor 111. The output node of the transistor 111 is coupled to theharmonic processing unit 113 via the transmission line 112. A connectionpoint 114 which is connected to the harmonic processing unit 113 iscoupled to the output unit 142 via the transmission line 115.

Similarly, the amplification stage 120 includes a transistor 121, atransmission line 122, a harmonic processing unit 123, and atransmission line 125. The transistor 121 amplifies a high-frequencysignal supplied from the input unit 141. The harmonic processing unit123 processes harmonics present in the amplified high-frequency signaloutput from the transistor 121. The output node of the transistor 121 iscoupled to the harmonic processing unit 123 via the transmission line122. A connection point 124 which is connected to the harmonicprocessing unit 123 is coupled to the output unit 142 via thetransmission line 125.

Namely, the amplifier 1000 uses each of the transistors 111 and 121 toamplify the high-frequency signal supplied from the input unit 141, andcombines the amplified signals output from the transistors 111 and 121via the transmission lines 115 and 125 for provision to the output unit142. In order to reduce oscillation caused by a phase difference betweenthe signals output from the transistors 111 and 121, the amplifier 1000includes a resistor 151 connecting the connection point 114 and theconnection point 124.

Each of the harmonic processing units 113 and 123 is an open stub havinga length equal to a quarter wavelength of the second harmonic present inthe amplified high-frequency signal that is output from a respective oneof the transistors 111 and 121, for example. Since an open stub having alength equal to a quarter wavelength of the second harmonic is connectedto the connection points 114 and 124, each of the connection points 114and 124 corresponds in position to the antinode of a second harmonicstanding wave as illustrated in FIG. 2. Accordingly, a standing wave iscreated along the resistor 151 linking the connection point 114 and theconnection point 124.

When there is variation in circuit characteristics between theamplification stage 110 and the amplification stage 120, a phasedifference may develop between the standing waves occurring at therespective connection points 114 and 124. With a phase differencebetween the standing waves occurring at the respective connection points114 and 124, the potential of the connection point 124 may become lowerthan the potential of the connection point 114 at a certain point intime. The presence of a potential difference between the connectionpoint 114 and the connection point 124 may cause electric powerexceeding a tolerable level to be applied to the resistor 151, therebygiving rise to a risk of an open-circuit failure at the resistor 151.

The amplifier of the present disclosures is configured to reduce theoccurrence of an open-circuit failure at the one or more resistorsconnecting connection points. In the following, the amplifier of thepresent disclosures will be described.

FIG. 3 is a drawing illustrating an amplifier according to a firstembodiment. An amplifier 101 includes two amplification stages 10 and 20that are connected in parallel between an input unit 41 and an outputunit 42, and further includes a feedback circuit 60.

A high-frequency signal (e.g., microwave signal) supplied from the inputunit 41 is distributed to the amplification stages 10 and 20. Each ofthe amplification stages 10 and 20 amplifies the supplied high-frequencysignal. The high-frequency signals amplified by the respectiveamplification stages 10 and 20 are combined and output from the outputunit 42. The output unit 42 represents a superimposition point at whichthe high-frequency signals amplified by the respective amplificationstages 10 and 20 are combined.

The amplification stages 10 and 20 have the same or similar circuitconfiguration. The amplification stage 10 includes a transistor 11, atransmission line 12, a harmonic processing unit 13, a connection point14, and a transmission line 15, for example. The amplification stage 20includes a transistor 21, a transmission line 22, a harmonic processingunit 23, a connection point 24, and a transmission line 25, for example.

Each of the transistors 11 and 21 amplifies a high-frequency signalsupplied from the input unit 41. Each of the transistors 11 and 21 maybe an FET (field effect transistor) having a gate, a source, and adrain. In such a case, the high-frequency signal supplied from the inputunit 41 is applied to the gate of each of the transistors 11 and 21, andthe amplified high-frequency signals are output from the drains servingas output nodes. Each of the transistors 11 and 21 may alternatively bea unit transistor comprised of a plurality of transistor cells whosegates are coupled to each other.

The harmonic processing unit 13, which is coupled to the output node ofthe transistor 11, processes harmonics present in the amplifiedhigh-frequency signal output from the output node of the transistor 11.The output node of the transistor 11 is coupled to one end of theharmonic processing unit 13 at the connection point 14 via thetransmission line 12. Similarly, the harmonic processing unit 23, whichis coupled to the output node of the transistor 21, processes harmonicspresent in the amplified high-frequency signal output from the outputnode of the transistor 21. The output node of the transistor 21 iscoupled to one end of the harmonic processing unit 23 at the connectionpoint 24 via the transmission line 22.

It is preferable for the harmonic processing unit 13 to provide ashort-circuit state (i.e., substantially zero impedance) with respect tothe second harmonic present in the amplified high-frequency signaloutput from the output node of the transistor 11. For example, theharmonic processing unit 13 provides a short-circuit state with respectto the second or higher even-numbered harmonics and an open-circuitstate with respect to the third or higher odd-numbered harmonics. Thesame applies in the case of the harmonic processing unit 23.

The harmonic processing unit 13 is an open stub having a length equal toa quarter wavelength of the second harmonic f2 present in the amplifiedhigh-frequency signal that is output from the output node of thetransistor 11, for example. In order for the harmonic processing unit 13to provide a short-circuit state with respect to the second harmonic f2,the length of the open stub is set to λ/8 for the wavelength λ of thefundamental wave, and is set to λ₂/4 for the wavelength λ₂ of the secondharmonic f2 whose frequency is two times the frequency of thefundamental wave. The same applies in the case of the harmonicprocessing unit 23.

The connection point 14 which is connected to the harmonic processingunit 13 is coupled and matched to the output unit 42 via thetransmission line 15. The connection point 24 which is connected to theharmonic processing unit 23 is coupled and matched to the output unit 42via the transmission line 25.

Namely, the amplifier 101 uses each of the transistors 11 and 21 toamplify the high-frequency signal supplied from the input unit 41, andcombines the amplified signals output from the transistors 11 and 21 viathe transmission lines 15 and 25 for provision to the output unit 42. Inorder to reduce oscillation caused by a phase difference between thesignals output from the transistors 11 and 21, the amplifier 101includes a resistor 51 connecting the connection point 14 and theconnection point 24. The resistor 51 is an oscillation-suppressionresistor (i.e., oscillation-stabilization resistor) connected to theconnection points of the adjacent amplification stages 10 and 20.

In the amplifier 101 illustrated in FIG. 3, the length of thetransmission line 15 connecting the connection point 14 and the outputunit 42 (i.e., the length from the connection point 14 to the outputunit 42) is a quarter wavelength of the second harmonic. Similarly, thelength of the transmission line 25 connecting the connection point 24and the output unit 42 (i.e., the length from the connection point 24 tothe output unit 42) is a quarter wavelength of the second harmonic.

The antinode of a second harmonic standing wave appears at theconnection points 14 and 24 due to the fact that the harmonic processingunits 13 and 23 are connected to the connection points 14 and 24,respectively. Because of this, the output unit 42 situated at a distanceof a quarter wavelength of the second harmonic from the connectionpoints 14 and 24 corresponds in position to the node of the standingwave. In consideration of this, the amplifier 101 of the presentdisclosures includes the feedback circuit 60 that feeds back the signalat the output unit 42 to the opposite ends of the resistor 51 connectedto the respective connection points 14 and 24 of the amplificationstages 10 and 20.

With the presence of such a feedback circuit 60, the phase observed atthe output unit 42 where the high-frequency signals amplified by therespective amplification stages 10 and 20 are combined is fed back tothe opposite ends of the resistor 51 experiencing the occurrence of astanding wave. Accordingly, the phase of the second harmonic standingwave occurring at the connection point 14 connected to one end of theresistor 51 and the phase of the second harmonic standing wave occurringat the connection point 24 connected to the other end of the resistor 51are set equal to each other. Electric power applied across the resistor51 is thus reduced, which reduces the likelihood of an open-circuitfailure occurring at the resistor 51. Moreover, reduction in the phasedifference between the signal at the connection point 14 and the signalat the connection point 24 further improves the ability of the resistor51 to reduce the oscillation of a fundamental wave, thereby improvingthe power added efficiency of the amplifier 101.

The feedback circuit 60 is one or a combination of the following: aninductor and a resistor. In the feedback circuit 60 illustrated in FIG.3, either an inductor 61 or a resistor 71, or both, are connectedbetween the output unit 42 and one end of the resistor 51 (i.e., theconnection point 14), and either an inductor 62 or a resistor 72, orboth, are connected between the output unit 42 and the other end of theresistor 51 (i.e., the connection point 24). The feedback circuit 60 isimplemented as a bonding wire inclusive of an inductance component, forexample.

FIG. 4 is a drawing illustrating an amplifier according to a secondembodiment. The configurations and advantages of the second embodimentthat are the same as those of the first embodiment will be omitted, butshould be understood by referring to the previous descriptions. Anamplifier 102 of the second embodiment illustrated in FIG. 4 differsfrom the amplifier 101 of the first embodiment illustrated in FIG. 3 inthat the length of each of the transmission lines 15 and 25 is longerthan a quarter wavelength of the second harmonic.

The transmission line 15 illustrated in FIG. 4 includes a transmissionline section 15 a and a transmission line section 15 b. The transmissionline section 15 a has one end thereof connected to the connection point14 and the other end thereof connected to one end of the transmissionline section 15 b. The length of the transmission line section 15 a isequal to a quarter wavelength of the second harmonic. The transmissionline section 15 b has one end thereof connected to the other end of thetransmission line section 15 a and the other end thereof connected tothe output unit 42. Similarly, the transmission line 25 illustrated inFIG. 4 includes a transmission line section 25 a and a transmission linesection 25 b. The transmission line section 25 a has one end thereofconnected to the connection point 24 and the other end thereof connectedto one end of the transmission line section 25 b. The length of thetransmission line section 25 a is equal to a quarter wavelength of thesecond harmonic. The transmission line section 25 b has one end thereofconnected to the other end of the transmission line section 25 a and theother end thereof connected to the output unit 42.

The antinode of a second harmonic standing wave appears at theconnection points 14 and 24 due to the fact that the harmonic processingunits 13 and 23 are connected to the connection points 14 and 24,respectively. Because of this, points 15 c and 25 c situated at adistance of a quarter wavelength of the second harmonic from therespective connection points 14 and 24 correspond in position to thenode of a standing wave. In consideration of this, the amplifier 102 ofthe present disclosures includes a feedback circuit 65 that feeds backthe signals at the midway points 15 c and 25 c on the respectivetransmission lines 15 and 25 to the opposite ends of the resistor 51connected to the respective connection points 14 and 24 of theamplification stages 10 and 20.

With the presence of such a feedback circuit 65, the phases observed atthe points 15 c and 25 c at which the nodes of standing waves appear arefed back to the opposite ends of the resistor 51 experiencing theoccurrence of a standing wave. Accordingly, the phase of the secondharmonic standing wave occurring at the connection point 14 connected toone end of the resistor 51 and the phase of the second harmonic standingwave occurring at the connection point 24 connected to the other end ofthe resistor 52 are set equal to each other. Electric power appliedacross the resistor 51 is thus reduced, which reduces the likelihood ofan open-circuit failure occurring at the resistor 51. Moreover,reduction in the phase difference between the signal at the connectionpoint 14 and the signal at the connection point 24 further improves theability of the resistor 51 to reduce the oscillation of a fundamentalwave, thereby improving the power added efficiency of the amplifier 102.

FIG. 5 is a drawing illustrating an amplifier according to a thirdembodiment. The configurations and advantages of the third embodimentthat are the same as those of the first embodiment will be omitted, butshould be understood by referring to the previous descriptions. Anamplifier 103 of the third embodiment illustrated in FIG. 5 differs fromthe amplifier 101 of the first embodiment illustrated in FIG. 3 in thatthere are three amplification stages situated in parallel between theinput unit 41 and the output unit 42.

The amplifier 103 illustrated in FIG. 5 includes three amplificationstages 10, 20, and 30. The amplification stages 10, 20, and 30 have thesame or similar circuit configuration. The amplification stage 30includes a transistor 31, a transmission line 32, a harmonic processingunit 33, a connection point 34, and a transmission line 35, for example.

Namely, the amplifier 103 uses each of the transistors 11, 21, and 31 toamplify the high-frequency signal supplied from the input unit 41, andcombines the amplified signals output from the transistors 11, 21, and31 via the transmission lines 15, 25, and 35 for provision to the outputunit 42. In order to reduce oscillations caused by phase differencesbetween the signals output from the transistors 11, 21, and 31, theamplifier 103 includes the resistor 51 providing a connection betweenthe connection point 14 and the connection point 24 and a resistor 52providing a connection between the connection point 24 and theconnection point 34. The number of stabilization resistors is one fewerthan the number of amplification stages.

With the presence of a feedback circuit 60 similar to that of the firstembodiment, the phase observed at the output unit 42 where thehigh-frequency signals amplified by the respective amplification stages10, 20, and 30 are combined is fed back to the opposite ends of theresistors 51 and 52 experiencing the occurrence of standing waves. As aresult, the opposite ends of the resistor 51 are set to the same phase,and the opposite ends of the resistor 52 are also set to the same phase.Electric power applied across the resistors 51 and 52 is thus reduced,which reduces the likelihood of an open-circuit failure occurring at theresistors 51 and 52. The same phase at the opposite ends of the resistor51 and the same phase at the opposite ends of the resistor 52 furtherincrease the ability of the resistors 51 and 52 to reducefundamental-wave oscillations, thereby improving the power addedefficiency of the amplifier 103.

Similarly to the feedback circuit of the first embodiment, the feedbackcircuit of the third embodiment includes either an inductor or aresistor, or both. The feedback circuit 60 illustrated in FIG. 5includes inductors 61 and 62 connected to the respective ends of theresistor 51 and to the output unit 42, and includes inductors 63 and 64connected to the respective ends of the resistor 52 and to the outputunit 42.

FIG. 6 is a drawing illustrating an amplifier according to a fourthembodiment. The configurations and advantages of the fourth embodimentthat are the same as those of the third embodiment will be omitted, butshould be understood by referring to the previous descriptions. Anamplifier 104 of the fourth embodiment illustrated in FIG. 6 differsfrom the amplifier 103 of the third embodiment illustrated in FIG. 5 inthat the length of each of the transmission lines 15, 25, and 35 islonger than a quarter wavelength of the second harmonic.

The transmission line 35 illustrated in FIG. 6 includes a transmissionline section 35 a and a transmission line section 35 b. The transmissionline section 35 a has one end thereof connected to the connection point34 and the other end thereof connected to one end of the transmissionline section 35 b. The length of the transmission line section 35 a isequal to a quarter wavelength of the second harmonic. The transmissionline section 35 b has one end thereof connected to the other end of thetransmission line section 35 a and the other end thereof connected tothe output unit 42.

With the presence of a feedback circuit 65 similar to that of the secondembodiment, the phases observed at the points 15 c and 25 c at which thenodes of standing waves appear are fed back to the opposite ends of theresistor 51 experiencing the occurrence of a standing wave. Further, thephases observed at the points 25 c and 35 c at which the nodes ofstanding waves appear are fed back to the opposite ends of the resistor52 experiencing the occurrence of a standing wave. As a result, theopposite ends of the resistor 51 are set to the same phase, and theopposite ends of the resistor 52 are also set to the same phase.Electric power applied across the resistors 51 and 52 is thus reduced,which reduces the likelihood of an open-circuit failure occurring at theresistors 51 and 52. The same phase at the opposite ends of the resistor51 and the same phase at the opposite ends of the resistor 52 furtherincrease the ability of the resistors 51 and 52 to reducefundamental-wave oscillations, thereby improving the power addedefficiency of the amplifier 104.

FIG. 7 is a drawing illustrating an example of measured characteristicsof S21 which is one of the S parameters. S21 represents theamplification gain of an amplifier. In FIG. 7, a solid line representsthe amplification gain of the amplifier 1000 (i.e., comparative example)illustrated in FIG. 2, and a dashed line represents the amplificationgain of the amplifier 101 (i.e., first embodiment) illustrated in FIG.3. In the case of the amplifier 1000 having no feedback circuits,oscillation occurs between an intermediate frequency FC and a highfrequency FH. In the case of the amplifier 101 having the feedbackcircuit 60, oscillation is suppressed, and the amplification gainincreases between the intermediate frequency FC and a high frequency FH.

FIG. 8 is a drawing illustrating an example of measured added powerefficiency (i.e., PAE) with respect to input power Pin applied to anamplifier. In FIG. 8, a solid line represents the PAE of the amplifier1000 (i.e., comparative example) illustrated in FIG. 2, and a dashedline represents the PAE of the amplifier 101 (i.e., first embodiment)illustrated in FIG. 3. As illustrated in FIG. 8, the PAE of theamplifier 101 exhibits improvements over the PAE of the amplifier 1000,with a 7% increase with respect to relatively high input power Pin.

According to the present disclosures, the open-circuit failure ofresistors is reduced

Although the amplifiers have been described by referring to theembodiments, the present invention is not limited to these embodiments.Various modifications and improvements such as combining or replacing anembodiment partially or entirely with one or more other embodiments maybe made without departing from the scope of the present invention.

For example, a circuit configuration similar to those of the describedembodiments is employed to produce the same or similar advantages asdescribed heretofore even in the case in which four or moreamplification stages are provided.

All examples and conditional language recited herein are intended forpedagogical purposes to aid the reader in understanding the inventionand the concepts contributed by the inventor to furthering the art, andare to be construed as being without limitation to such specificallyrecited examples and conditions, nor does the organization of suchexamples in the specification relate to a showing of the superiority andinferiority of the invention. Although the embodiment(s) of the presentinventions have been described in detail, it should be understood thatthe various changes, substitutions, and alterations could be made heretowithout departing from the spirit and scope of the invention.

What is claimed is:
 1. An amplifier comprising: a plurality ofamplification stages connected in parallel between an input point and anoutput point; and a feedback circuit, wherein each of the plurality ofamplification stages includes: a transistor configured to amplify ahigh-frequency signal supplied from the input point; a harmonicprocessing unit coupled to an output node of the transistor andconfigured to process harmonics present in an amplified high-frequencysignal output from the output node; a connection point between theoutput node and the harmonic processing unit; and a transmission lineconnecting the connection point and the output point, wherein thefeedback circuit is configured to feed back a signal at the output pointor a midway point of the transmission line of a given one of theamplification stages to a first end of a resistor, the first end of theresistor being connected to the connection point of the given one of theamplification stages, and a second end of the resistor being connectedto the connection point of another one of the amplification stages. 2.The amplifier as claimed in claim 1, wherein the harmonic processingunit is configured to provide a short-circuit state with respect to asecond harmonic among the harmonics.
 3. The amplifier as claimed inclaim 1, wherein the harmonic processing unit is an open stub having alength equal to a quarter wavelength of a second harmonic among theharmonics.
 4. The amplifier as claimed in claim 2, wherein the feedbackcircuit is configured to feed back the signal at the output point to thefirst end of the resistor, and the length of the transmission line is aquarter wavelength of the second harmonic.
 5. The amplifier as claimedin claim 2, wherein the feedback circuit is configured to feed back thesignal at the midway point to the first end of the resistor, and themidway point is at a distance of a quarter wavelength of the secondharmonic from the connection point.
 6. The amplifier as claimed in claim1, wherein the feedback circuit is at least one of an inductor and aresistor.
 7. A transmitter, comprising: an amplifier; and an antennacoupled to an output node of the amplifier, wherein the amplifierincludes: a plurality of amplification stages connected in parallelbetween an input point and an output point; and a feedback circuit,wherein each of the plurality of amplification stages includes: atransistor configured to amplify a high-frequency signal supplied fromthe input point; a harmonic processing unit coupled to an output node ofthe transistor and configured to process harmonics present in anamplified high-frequency signal output from the output node; aconnection point between the output node and the harmonic processingunit; and a transmission line connecting the connection point and theoutput point, wherein the feedback circuit is configured to feed back asignal at the output point or a midway point of the transmission line ofa given one of the amplification stages to a first end of a resistor,the first end of the resistor being connected to the connection point ofthe given one of the amplification stages, and a second end of theresistor being connected to the connection point of another one of theamplification stages.